Job description

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Filed my income tax return. Seems like I don't hv to pay any tax this year :) -------------------------------------------------------------------

I guess most of my friends do not know what I'm doing in my daily 8 to 5 occupation (occasionally got OT, not every time 8 to 5). I'll briefly explain it in this post, trying to make it as non-technical as possible.

First of all, a brief introduction to my company. Altera is a leading manufacturer of programmable logic devices, such as FPGA (field programmable gate array) and CPLD (complex programmable logic device). Altera is a fab-less design house with headquarter in San Jose, California. Read more about it in wikipedia here.

My job title is HCDC Design Engineer. I know, your first questions will be to ask me, what does HCDC stands for?

What HCDC stands for?
HCDC stands for HardCopy Design Centre.

What is Hardcopy?
Altera HardCopy devices are the industry’s first structured ASICs that offer a comprehensive alternative to ASICs

Terms you need to know in order to proceed
ASIC: stands for application-specific integrated circuit. Means that the IC is not programmable and only serve a specific purpose.
structured ASIC: is half ASIC, half programmable. Hardcopy is a structured ASIC.

How different is structured ASIC from ASIC?
ASIC is fully custom-made whereas for structured ASIC, some metal layers are prebuilt and some layers are custom-made. The custom-made layers for structured ASIC are the macro cells and the routing layers.

What do I do in HCDC? (in customer's perspective)
We do conversion from FPGA (a programmable device) to Hardcopy (structured ASIC). Let me give an example for easy understanding:
A customer design a projector using Altera's software, QuartusII and then download it into the programmable device (FPGA). And then test it on the system board. It works, so the customer will put it to production. The price of a Hardcopy is cheaper than an FPGA, customer will opt for Hardcopy. Customer will send the design into HCDC for conversion, and at the same time production for the projector is on-going using FPGA. Within approximately 20 weeks, customer will get their Hardcopy version from Altera, prototyped only for their projector. By then, their projector will be using Hardcopy rather than FPGA.

What do I do in HCDC? (as a job)
As I've mention above, FPGA is a programmable device. Customer A might have 80% utilization of the chip but customer B may only utilize 40%. Take memory as an example, some designs use lots of memory and some use less. In HCDC, we will throw out those unused memory cell, take out unused routing tracks (wires) and then re-route the connection. When the routing changes, net capacitance and wire length will change also. With that we have to do timing analysis to make sure that with new routing, all the connection still meets setup and hold time (remember flip-flop?), make sure that there is no timing violations. If some path fails, then we have to do ECO (Engineering Change Order), and redo timing analysis. This cycles of ECOs and timing analysis will be repeated until all path meets timing.

The first 2 to 4 weeks is the time when the design is handled by my department
We have a tight schedule in HCDC

Sounds easy eh? I hope it is as easy as it sounds. It is an interesting job and challenging in a way as different customer designs have different requirements and different specs. There's still a lot for me to learn and I'm happy that I love my job.

I hope my explanations are simple and clear enough for my friends to understand, technical and non-technical friends alike.